c - In Microchip C18, why does the insertion of a NOP cause much larger code? -
i have code in isr. code given completeness, question commented-out __asm_ block.
without __asm_ block, compiled 82 instructions. __asm_ block, result 107 instructions long. why big difference?
here's c code:
if (pir1bits.sspif) { spi_rec_buffer.read_cursor = 0; spi_rec_buffer.write_cursor = 0; latabits.lata4 ^= 1; // _asm nop nop _endasm latabits.lata4 ^= 1; while (!portabits.not_ss && spi_rec_buffer.write_cursor < spi_rec_buffer.size) { spi_rec_buffer.data[spi_rec_buffer.write_cursor] = sspbuf; sspbuf = spi_out_msg_buffer.data[spi_out_msg_buffer.read_cursor]; pir1bits.sspif = 0; spi_rec_buffer.write_cursor++; spi_out_msg_buffer.read_cursor++; if (spi_out_msg_buffer.read_cursor == spi_out_msg_buffer.write_cursor) latabits.lata4 = 0; latbbits.latb1 = 1; while (!portabits.not_ss && !pir1bits.sspif); latbbits.latb1 = 0; } spi_message_locked = true; spi_message_received = true; }
without nops:
btfss 0x9e,0x3,0x0 if (pir1bits.sspif) bra 0x2ba { movlb 0xf spi_rec_buffer.read_cursor = 0; clrf 0x4,0x1 clrf 0x5,0x1 clrf 0x6,0x1 spi_rec_buffer.write_cursor = 0; clrf 0x7,0x1 btg 0x89,0x4,0x0 latabits.lata4 ^= 1; btg 0x89,0x4,0x0 latabits.lata4 ^= 1; movf 0x80,0x0,0x0 while (!portabits.not_ss && spi_rec_buffer.write_cursor < spi_rec_buffer.size) andlw 0x20 bnz 0x2b0 movlb 0xf movf 0x7,0x0,0x1 xorwf 0x3,0x0,0x1 btfss 0xe8,0x7,0x0 bra 0x254 rlcf 0x3,0x0,0x1 bra 0x25c movf 0x2,0x0,0x1 subwf 0x6,0x0,0x1 movf 0x3,0x0,0x1 subwfb 0x7,0x0,0x1 bc 0x2b0 bra 0x240 { movf 0x0,0x0,0x1 spi_rec_buffer.data[spi_rec_buffer.write_cursor] = sspbuf; addwf 0x6,0x0,0x1 movwf 0xe9,0x0 movf 0x1,0x0,0x1 addwfc 0x7,0x0,0x1 movwf 0xea,0x0 movff 0xfc9,0xfef movlb 0xf sspbuf = spi_out_msg_buffer.data[spi_out_msg_buffer.read_cursor]; movf 0x10,0x0,0x1 addwf 0x14,0x0,0x1 movwf 0xe9,0x0 movf 0x11,0x0,0x1 addwfc 0x15,0x0,0x1 movwf 0xea,0x0 movf 0xef,0x0,0x0 movwf 0xc9,0x0 bcf 0x9e,0x3,0x0 pir1bits.sspif = 0; movlb 0xf spi_rec_buffer.write_cursor++; incf 0x6,0x1,0x1 movlw 0x0 addwfc 0x7,0x1,0x1 movlb 0xf spi_out_msg_buffer.read_cursor++; incf 0x14,0x1,0x1 addwfc 0x15,0x1,0x1 movf 0x16,0x0,0x1 if (spi_out_msg_buffer.read_cursor == spi_out_msg_buffer.write_cursor) xorwf 0x14,0x0,0x1 bnz 0x29e movf 0x17,0x0,0x1 xorwf 0x15,0x0,0x1 bnz 0x29e bcf 0x89,0x4,0x0 latabits.lata4 = 0; bsf 0x8a,0x1,0x0 latbbits.latb1 = 1; movf 0x80,0x0,0x0 while (!portabits.not_ss && !pir1bits.sspif); andlw 0x20 bnz 0x2ac movf 0x9e,0x0,0x0 andlw 0x8 bz 0x2a0 bcf 0x8a,0x1,0x0 latbbits.latb1 = 0; } movlb 0xf spi_message_locked = true; movlw 0x1 movwf 0x18,0x1 movlb 0xf spi_message_received = true; movwf 0x19,0x1 } movlw 0x4 } subwf 0xe1,0x0,0x0 bc 0x2c4 clrf 0xe1,0x0 movf 0xe5,0x1,0x0 movwf 0xe1,0x0 movf 0xe5,0x1,0x0 movff 0xfe7,0xfd9 movf 0xe5,0x1,0x0 movff 0xfe5,0xfea movff 0xfe5,0xfe9 movff 0xfe5,0xfda retfie 0x1
with nops:
btfss 0x9e,0x3,0x0 if (pir1bits.sspif) bra 0x30e { movlb 0xf spi_rec_buffer.read_cursor = 0; clrf 0x4,0x1 clrf 0x5,0x1 movlb 0xf spi_rec_buffer.write_cursor = 0; clrf 0x6,0x1 clrf 0x7,0x1 btg 0x89,0x4,0x0 latabits.lata4 ^= 1; nop _asm nop nop _endasm nop btg 0x89,0x4,0x0 latabits.lata4 ^= 1; movf 0x80,0x0,0x0 while (!portabits.not_ss && spi_rec_buffer.write_cursor < spi_rec_buffer.size) andlw 0x20 bnz 0x302 movlb 0xf movf 0x7,0x0,0x1 movlb 0xf xorwf 0x3,0x0,0x1 btfss 0xe8,0x7,0x0 bra 0x27e rlcf 0x3,0x0,0x1 bra 0x28c movf 0x2,0x0,0x1 movlb 0xf subwf 0x6,0x0,0x1 movlb 0xf movf 0x3,0x0,0x1 movlb 0xf subwfb 0x7,0x0,0x1 bc 0x302 bra 0x268 { movlb 0xf spi_rec_buffer.data[spi_rec_buffer.write_cursor] = sspbuf; movlb 0xf movf 0x0,0x0,0x1 movlb 0xf addwf 0x6,0x0,0x1 movwf 0xe9,0x0 movlb 0xf movlb 0xf movf 0x1,0x0,0x1 movlb 0xf addwfc 0x7,0x0,0x1 movwf 0xea,0x0 movff 0xfc9,0xfef movlb 0xf sspbuf = spi_out_msg_buffer.data[spi_out_msg_buffer.read_cursor]; movlb 0xf movf 0x10,0x0,0x1 movlb 0xf addwf 0x14,0x0,0x1 movwf 0xe9,0x0 movlb 0xf movlb 0xf movf 0x11,0x0,0x1 movlb 0xf addwfc 0x15,0x0,0x1 movwf 0xea,0x0 movf 0xef,0x0,0x0 movwf 0xc9,0x0 bcf 0x9e,0x3,0x0 pir1bits.sspif = 0; // interruptflag löschen... movlb 0xf spi_rec_buffer.write_cursor++; incf 0x6,0x1,0x1 movlw 0x0 addwfc 0x7,0x1,0x1 movlb 0xf spi_out_msg_buffer.read_cursor++; incf 0x14,0x1,0x1 movlw 0x0 addwfc 0x15,0x1,0x1 movlb 0xf if (spi_out_msg_buffer.read_cursor == spi_out_msg_buffer.write_cursor) movf 0x16,0x0,0x1 movlb 0xf xorwf 0x14,0x0,0x1 bnz 0x2ea movlb 0xf movf 0x17,0x0,0x1 movlb 0xf xorwf 0x15,0x0,0x1 bnz 0x2ee bcf 0x89,0x4,0x0 latabits.lata4 = 0; bsf 0x8a,0x1,0x0 latbbits.latb1 = 1; movf 0x80,0x0,0x0 while (!portabits.not_ss && !pir1bits.sspif); andlw 0x20 bnz 0x2fe movf 0x9e,0x0,0x0 andlw 0x8 bnz 0x2fe bra 0x2f0 bcf 0x8a,0x1,0x0 latbbits.latb1 = 0; } movlb 0xf spi_message_locked = true; movlw 0x1 movwf 0x18,0x1 movlb 0xf spi_message_received = true; movlw 0x1 movwf 0x19,0x1 } movlw 0x4 } subwf 0xe1,0x0,0x0 bc 0x318 clrf 0xe1,0x0 movf 0xe5,0x1,0x0 movwf 0xe1,0x0 movf 0xe5,0x1,0x0 movff 0xfe7,0xfd9 movf 0xe5,0x1,0x0 movff 0xfe5,0xfea movff 0xfe5,0xfe9 movff 0xfe5,0xfda retfie 0x1
so people don't have guess, here's statement the microchip c18 manual (emphasis added):
it recommended limit use of inline assembly minimum. any functions containing inline assembly not optimized compiler. write large fragments of assembly code, use mpasm assembler , link modules c modules using mplink linker.
i think common situation inline asm. gcc exception - optimize inline assembly along surrounding c code; in order correctly, gcc's inline assembly quite complex (you have let know registers , memory clobbered).
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