memory - What are the alignment restrictions on the new Haswell AVX "gather" instructions? -


i'm looking @ avx programming reference. new haswell instructions include eagerly awaited "gather" loads. however, can't figure out alignment restrictions on indexed data items. section 2.5 "memory alignment" of reference seems ought list various vgather* instructions in 1 of tables 2.4 or 2.5... doesn't.

background: while gather instructions' supported data sizes 4 , 8 bytes, application benefit gather-loading adjacent 16-bit data value pairs dwords. odd indices 2-byte scale produce 2-byte aligned 4-byte loads , it's not clear me manual whether fault or otherwise fail work intended (i rather suspect i'm out of luck given instructions supporting unaligned accesses seem have 'u' in them).

this first time hear avx2. i'm guessing memory alignment restriction won't different current implementation of avx on sandy bridge new vex coding scheme. i.e. no alignment required unless explicitly using aligned vmov instruction a in name. instruction allow access byte-granularity alignment.

in fact, see section 2.5, page 35 of intel(r) advanced vector extensions programming reference states this.


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